synchronous sequential circuit中文是什么意思

發(fā)音:

中文翻譯
造句

同步時序電路

synchronous adj. 同時的，同期的；【物理學(xué)】同步的。 adv. ...
sequential circuit 【電學(xué)】程序電路。
synchronous circuit 同步電路; 同步路
sequential synchronous transmission 順序同步傳輸; 順序同步傳送
synchronous sequential machine 同步時序機
synchronous sequential system 同步時序系統(tǒng)
circuit of data synchronous 同步數(shù)據(jù)電路
synchronous clamp circuit 同步箝位電路
synchronous logic circuit 同步邏輯電路
synchronous logical circuit 同步邏輯電路; 同步式邏輯電路
asynchronous sequential circuit 異步時序電路
autonomous sequential circuit 自激時序電路
clocked sequential circuit 時鐘進序電路; 時鐘時序電路
complex sequential circuit 復(fù)式時序電路
flip-flop sequential circuit 觸發(fā)器時序電路
iterative sequential circuit 累接時序電路
linear sequential circuit 線性時序電路
pulse mode sequential circuit 脈沖式進序電路
sequential flasher circuit 順序閃光回路
sequential logic circuit 時序邏輯電路
sequential logical circuit 時序邏輯電路
sequential start circuit 程序起動電路
sequential switch circuit 時序開關(guān)電路
sequential switching circuit 依次轉(zhuǎn)換電路; 依次轉(zhuǎn)接電路
synchronous adj. 同時的，同期的；【物理學(xué)】同步的。 adv. -ly

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例句與用法

We also develop a new word - level fault parallel fs algorithin for synchronous sequential circuits
接著又開發(fā)了一個新的單機字級故障并行fs算法。
Optimize synchronous sequential circuit with retiming was introduced by leiserson and saxe in 1983 , and retiming optimizational algorithm was summarized comprehensively in 1991
Leiserson和saxe于1983年提出了利用重定時優(yōu)化同步時序電路，并于1991年對重定時優(yōu)化算法做了全面的總結(jié)。
In order to eliminate the sequence conflict of synchronous sequential circuit and shorten the designable time of integrated circuits , the algorithms of retiming is deeply researched in this paper
本文對重定時算法進行了深入研究，目的在于消除同步時序電路的時序沖突，從而縮短集成電路的設(shè)計時間。
Base on the existing synchronous sequential circuits fault simulator - hope , the test vector generation method of sequential circuits based on ant algorithm is systematically researched firstly
本文在同步時序電路故障模擬器? hope的基礎(chǔ)上，率先對基于螞蟻算法的時序電路測試矢量生成方法作了系統(tǒng)的開拓性研究。
As emphasis , we propose a new backward width - flrst search circuit partitioning method with flip - flop as core for synchronous sequential circuits . and then based on it , we develop a new circuit parallel tg algorithm
最后重點對電路并行方法進行了研究，提出了一種新的以觸發(fā)器為核且消除大功能塊之間反饋的寬度優(yōu)先反向搜索同步時序電路劃分方法。
Test vector generation based on ant algorithm is presented and implemented , the pheromone computation formula for sequential circuits and status transfer rules are given , and the test results are compared with the results of the other existing test generators - hitec , gatest , cris , digate and strategate , based on standard sequential circuits iscas ' 89 and other synchronous sequential circuits
提出并實現(xiàn)了基于螞蟻算法的測試矢量生成，給出了針對時序電路測試矢量生成的信息素計算公式和狀態(tài)轉(zhuǎn)移規(guī)則。在iscas ’ 89標準時序電路和幾個同步時序電路上實現(xiàn)了測試生成，并將生成結(jié)果和其它現(xiàn)有測試生成器( hitec ， gatest ， cris ， digate ， strategate )的生成結(jié)果作了比較、分析。

其他語種釋義

synchronous sequential circuitとは意味：同期式順序回路｛どうきしきじゅんじょかいろ｝

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